Top-Down Design of a xDSL 14-bit 4MS/s Σ∆ Modulator in Digital CMOS Technology
نویسندگان
چکیده
This paper describes the design of a Sigma-Delta modulator aimed for A/D conversion in xDSL applications, featuring 14-bit@4Msample/s in a 0.35μm mainstream digital CMOS technology. Architecture selection, modulator sizing and cell sizing tasks where supported by a CAD methodology, thus allowing us to obtain a power efficient implementation in a short design cycle.
منابع مشابه
A HIGH-PERFORMANCE SIGMA-DELTA ADC FOR ADSL APPLICA- TIONS IN 0.35μm CMOS DIGITAL TECHNOLOGY
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